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Diseño de Tiempo Muerto

Referencia técnica sobre Diseño de Tiempo Muerto para el diseño, integración e implementación de sistemas de energía inalámbrica.

6 minArtículo 33/50Electrónica de Potencia

Dead-Time Design — educational diagram — Fig.: Diagrama educativo de “Dead-Time Design”.

Dead time is the interval when both high-side and low-side switches are commanded off before the opposite device turns on. Too little dead time risks shoot-through; too much forces body-diode conduction and loses ZVS benefit in resonant designs.

Dead time is not a single constant — it may vary with load, temperature, and device spread in production.

01Setting dead time

Start from driver and MOSFET datasheet recommendations, then adjust on hardware.
Account for driver propagation mismatch between high and low side.
Extend dead time when bus voltage or temperature rises if shoot-through margin shrinks.

Dead-Time Design — supporting diagram — Fig.: Ilustración de apoyo para “Dead-Time Design”.

02Resonant WPT interaction

During dead time, tank current freewheels through body diodes — reverse recovery when the switch turns on creates loss and EMI. Adaptive dead time algorithms use current polarity detection — validate across coupling range.

03Testing

Scope both gate drives and switch-node voltage simultaneously.
Production test for gross shoot-through — supply current spikes or fuse indicators.
Document dead time register values in firmware release notes.